1 ADC, 13 comm. interfaces

Features
Dynamic Efficiency Line with BAM (Batch
Acquisition Mode)
1.7 V to 3.6 V power supply
- 40C to 85/105/125 C temperature range
Core: Arm 32-bit Cortex-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator) allowing 0-wait state execution
from Flash memory, frequency up to 100 MHz,
memory protection unit,
125 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1),
and DSP instructions
Memories
Up to 512 Kbytes of Flash memory
128 Kbytes of SRAM
Clock, reset and supply management
1.7 V to 3.6 V application supply and I/Os
POR, PDR, PVD and BOR
4-to-26 MHz crystal oscillator
Internal 16 MHz factory-trimmed RC
32 kHz oscillator for RTC with calibration
Internal 32 kHz RC with calibration
Power consumption
Run: 100 A/MHz (peripheral off)
Stop (Flash in Stop mode, fast wakeup
time): 42 A Typ @ 25C; 65 A max
@25 C
Stop (Flash in Deep power down mode,
slow wakeup time): down to 9 A @ 25 C;
28 A max @25 C
Standby: 1.8 A @25 C / 1.7 V without
RTC; 11 A @85 C @1.7 V
VBAT supply for RTC: 1 A @25 C
112-bit, 2.4 MSPS A/D converter: up to 16
channels
General-purpose DMA: 16-stream DMA
controllers with FIFOs and burst support
Up to 11 timers: up to six 16-bit, two 32-bit
timers up to 100 MHz, each with up to four
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input, two watchdog
timers (independent and window) and a
SysTick timer